diff --git a/firmware/src/adc.rs b/firmware/src/adc.rs index c1c7a02..2197c0d 100644 --- a/firmware/src/adc.rs +++ b/firmware/src/adc.rs @@ -89,8 +89,6 @@ impl Tlc0832 { let command_bits = 0x06 | channel; // 110 or 111 in the top 3 bits let command_byte = command_bits << 5; // Shift to MSB position: 11000000 or 11100000 - info!("Reading channel {} with command bits {:03b} (0x{:02x})", channel, command_bits, command_byte); - // Send command byte + 2 dummy bytes to clock out the full response // The TLC0832 needs 11 total clock cycles: // 3 for command + 1 for MUX settling + 8 for data = 12 bits total @@ -105,8 +103,6 @@ impl Tlc0832 { } }; - info!("SPI response: [{:02x}, {:02x}]", response[0], response[1]); - // The result spans across the response bytes // After the 3 command bits + 1 MUX settling bit (4 bits total), // the next 8 bits are the conversion result @@ -124,7 +120,6 @@ impl Tlc0832 { self.cs.set_high().ok(); - info!("Channel {} result: {}", channel, result); Ok(result) } @@ -159,14 +154,12 @@ impl Tlc0832 { } pub fn update_and_get_midi_changes(&mut self) -> (Option, Option) { - info!("Updating and getting MIDI changes"); let mut midi_a_change = None; let mut midi_b_change = None; // Read channel 0 (pedal A) match self.read_channel(0) { Ok(raw_a) => { - info!("Raw channel 0 value: {}", raw_a); self.apply_iir_filter(0, raw_a); let filtered_a = (self.pedal_a_filtered >> 8) as u8; let midi_a = self.adc_to_midi(filtered_a, PEDAL_A_MIN, PEDAL_A_MAX); @@ -185,7 +178,6 @@ impl Tlc0832 { // Read channel 1 (pedal B) match self.read_channel(1) { Ok(raw_b) => { - info!("Raw channel 1 value: {}", raw_b); self.apply_iir_filter(1, raw_b); let filtered_b = (self.pedal_b_filtered >> 8) as u8; let midi_b = self.adc_to_midi(filtered_b, PEDAL_B_MIN, PEDAL_B_MAX); diff --git a/firmware/src/bus.rs b/firmware/src/bus.rs index 65a774f..d935080 100755 --- a/firmware/src/bus.rs +++ b/firmware/src/bus.rs @@ -4,7 +4,7 @@ use stm32f0xx_hal as hal; pub struct Bus { latch_en: hal::gpio::gpioa::PA0>, - select_en: hal::gpio::gpiob::PB8>, + select_en: hal::gpio::gpiob::PB8>, pb0: hal::gpio::gpiob::PB0>, pb1: hal::gpio::gpiob::PB1>, pb2: hal::gpio::gpiob::PB2>, @@ -31,7 +31,7 @@ impl Bus { cortex_m::interrupt::free(|cs| { Self { latch_en: latch_en.into_push_pull_output(cs), - select_en: select_en.into_open_drain_output(cs), + select_en: select_en.into_push_pull_output(cs), pb0: pb0.into_push_pull_output(cs), pb1: pb1.into_push_pull_output(cs), pb2: pb2.into_push_pull_output(cs),