ADC channel 1 working

This commit is contained in:
geens 2025-07-02 22:32:23 +02:00
parent 8d6a4c0e5a
commit 06f26bf00b

View File

@ -71,59 +71,6 @@ impl Tlc0832 {
})
}
fn test_spi_loopback(&mut self, channel: u8) -> Result<u8, &'static str> {
info!("SPI Loopback Test - Channel {}", channel);
// Test pattern: send different values and check if we get them back
let test_values = [0x55, 0xAA, 0x12, 0x34];
let test_byte = test_values[channel as usize % test_values.len()];
unsafe {
let spi2_base = 0x4000_3800 as *mut u32;
let dr_offset = 0x0C / 4; // Data register offset
let sr_offset = 0x08 / 4; // Status register offset
let dr_ptr = spi2_base.add(dr_offset);
let sr_ptr = spi2_base.add(sr_offset);
info!("Sending test byte: 0x{:02x}", test_byte);
// Send test byte
dr_ptr.write_volatile(test_byte as u32);
// Wait for TXE (transmit buffer empty) with timeout
let mut timeout = 1000;
while (sr_ptr.read_volatile() & (1 << 1)) == 0 {
timeout -= 1;
if timeout == 0 {
error!("Loopback timeout waiting for TXE");
return Err("SPI loopback timeout");
}
}
// Wait for RXNE (receive buffer not empty)
timeout = 1000;
while (sr_ptr.read_volatile() & (1 << 0)) == 0 {
timeout -= 1;
if timeout == 0 {
error!("Loopback timeout waiting for RXNE");
return Err("SPI loopback timeout");
}
}
let received = dr_ptr.read_volatile() as u8;
info!("Received: 0x{:02x}, Expected: 0x{:02x}", received, test_byte);
if received == test_byte {
info!("✓ SPI Loopback SUCCESS!");
Ok(received)
} else {
error!("✗ SPI Loopback FAILED - mismatch");
Err("SPI loopback mismatch")
}
}
}
pub fn read_channel(&mut self, channel: u8) -> Result<u8, &'static str> {
if channel > 1 {
return Err("Invalid channel");
@ -173,17 +120,20 @@ impl Tlc0832 {
}
fn apply_iir_filter(&mut self, channel: u8, new_value: u8) {
let new_value_scaled = (new_value as u16) << 8;
let new_value_scaled = (new_value as u32) << 8;
match channel {
0 => {
self.pedal_a_filtered = self.pedal_a_filtered - (self.pedal_a_filtered >> 8) * IIR_ALPHA / 256 + new_value_scaled * IIR_ALPHA / 256;
},
1 => {
self.pedal_b_filtered = self.pedal_b_filtered - (self.pedal_b_filtered >> 8) * IIR_ALPHA / 256 + new_value_scaled * IIR_ALPHA / 256;
},
_ => {}
}
let filtered_value = match channel {
0 => &mut self.pedal_a_filtered,
1 => &mut self.pedal_b_filtered,
_ => return,
};
let old_filtered_val = *filtered_value as u32;
let alpha = IIR_ALPHA as u32;
let new_filtered_val = (old_filtered_val * (256 - alpha) + new_value_scaled * alpha) / 256;
*filtered_value = new_filtered_val as u16;
}
fn adc_to_midi(&self, adc_value: u8, min_adc: u8, max_adc: u8) -> u8 {
@ -220,7 +170,6 @@ impl Tlc0832 {
}
}
/*
match self.read_channel(1) {
Ok(raw_b) => {
self.apply_iir_filter(1, raw_b);
@ -236,7 +185,6 @@ impl Tlc0832 {
error!("Error reading channel 1: {}", e);
}
}
*/
(midi_a_change, midi_b_change)
}